1. Field of the Invention
The present invention relates, in general, to a method for preparing a pattern overlay accuracy-measuring mark useful in the fabrication of semiconductor devices particularly, an improvement in measurement of overlay accuracy.
2. Description of Prior Art
Generally, a semiconductor device is fabricated by complicated processes wherein a plurality of light-exposure masks are repeatedly aligned by a stepper. The stepper, which is a limited light-exposing apparatus operable in a step-and-repeat manner repeatedly moves a stage in an x-y direction so as to align the masks prior to exposure to light. By means of the stepper, a wafer is aligned in a manual or automatic manner on the basis of an alignment mark. At the moment, an error may be generated by mechanical motion of the stage during alignment. If this alignment error exceeds an allowable limit, a defect may be generated in the semiconductor device.
Usually, an overlay accuracy-measuring mark, involving an upper mark which is overlapped with a lower mark, measures alignment error. The control range of overlay accuracy for misalignment acts on the design rule of the semiconductor device and is typically in a range of 20 to 30%.
Although the alignment mark relies upon layer-to-layer alignment between different light-exposure masks, it is really used for the alignment between dies with respect to one light-exposure mask. The alignment mark is detected by the recognizer of the stepper in advance of a light-exposing step, which is necessary to revise the overlay accuracy between two patterns thus formed, the accuracy of which has been measured by additional measuring equipment. The term "die" used herein means the total region that is formed by one light-exposing process, and one die may include a plurality of semiconductor devices.
The alignment mark and the overlay accuracy-measuring mark are formed on a scribe line, which can be a portion of wafer where no semiconductor chip is mounted. One methods for measuring the degree of misalignment with the measuring mark, involves either visual checking using a vernier-measuring mark, or automatic checking using a box-in-box or bar-in-bar measuring mark.
In order to better understand the background of the invention, a description is given for the conventional box-in-box measuring mark with reference to some drawings.
Referring to FIG. 1, a scribe line 1 is shown which comprises an outer box 3 and an inner box 4. The outer box 3 is formed by removing a lower film on the scribe line typically measuring 20.times.20 .mu.m.sup.2 whereas the inner box 4 is formed by leaving an upper film at the central portion of the outer box typically measuring of 10.times.10 .mu.m.sup.2.
FIG. 2 shows cross sectional view taken generally through line II--II of FIG. 1. As shown in this figure, a plurality of layers is deposited over the scribe line of a wafer 11. A first layer 12 is formed on the wafer 11, followed by deposition of a second layer 13 thereon. The second layer 13 is then patterned by photo etching, that portion of the second layer 13 over the scribe line is removed to form the outer box shown in FIG. 1. The inner box is formed by affixing a third layer 14, the central portion of which is covered with a photosensitive pattern 15. The photosensitive pattern serves as a mask when the third layer is photoetched.
The overlay accuracy measuring mark method also includes gauging distances between the sides of the outer box and the inner box, comparing the distances from one another, and revising the misalignment of the X-Y axes of stage. Therefore, it is obvious that the boundary lines of the boxes must be accurately defined for maximum overlay accuracy. The boundary lines are usually determined by irradiating a light and sensing the reflected light.
However, the conventional methods have difficulty in practice. For example, assuming that the second layer 13 is formed with a relatively thin polysilicon film or insulating film and the third layer 14 is a metal layer composed of tungsten or Al--Cu--Si alloy, when the metal layer is deposited, smoothly curved flow occurs at the edge portions of the outer box, restraining accurate definition of the boundary line therein. In addition, since the component metals of Al--Cu--Si alloy are different in grain size, the boundary line of the outer box may be definitely determined or may zigzag along the box.
In an effort to overcome the difficulty of defining the boundary line, a measurement is made after the metal layer is deposited over the etched outer box. However, production of the measuring mark is complicated, and any small defect in the etching step lowers reliability of the resulting semiconductor device.